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A Physics–based Model for Electrical Parameters of Double gate Hetero-material Nano Scale Tunnel FET

Brinda Bhowmick, Srimanta Baishya Published in Electronics

International Journal of Applied Information Systems
Year of Publication 2012
© 2010 by IJAIS Journal
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  1. Brinda Bhowmick and Srimanta Baishya. Article: A Physicsbased Model for Electrical Parameters of Double gate Hetero-material Nano Scale Tunnel FET. International Journal of Applied Information Systems 1(3):25-32, February 2012. BibTeX

    	author = "Brinda Bhowmick and Srimanta Baishya",
    	title = "Article: A Physicsbased Model for Electrical Parameters of Double gate Hetero-material Nano Scale Tunnel FET",
    	journal = "International Journal of Applied Information Systems",
    	year = 2012,
    	volume = 1,
    	number = 3,
    	pages = "25-32",
    	month = "February",
    	note = "Published by Foundation of Computer Science, New York, USA"


This paper focuses a hetero gate material dielectric DG TFET with low band gap source material, which offers high ratio, sub 60mV/dec subthreshold swing along with significant improvement in on current. Here analytical model for 2D electric field is derived from Poisson’s equation and is used to determine the subthreshold swing, transconductance, output conductance, gate threshold voltage, and drain threshold voltage of the proposed device. The results of derived model are compared with that of simulated results to examine the validity of model of electrical parameters and also comparison of the analytical model results with simulated results shows excellent agreement.


  1. Vanndamme EP, Janson P, and Deferen L. 1997. Modelling the subthresholdswing in MOSFETS. IEEE Electron Device Letters 18, 369-371 .
  2. Gopalakrishnan K, Woo K, Jungemann K, Graffin C, Plummer PB .2005 Impact ionization MOS-IMOS-part III,experimental results. IEEE Electron Device letters 52, 77-84.
  3. Appenzeller J, Lin YM, Knoch J, Avouris P. 2005. Band-to-band tunneling in carbon Nanotube fiel-effect transistors. Phys. Rev.Lett 93, 196805-1—196805-4
  4. Bhuwalka K, Sedlmaier S, Ludsteck A, Tolksdorf C, Schulze J, Eisele I 2004 Vertical tunnel field effect transistor. IEEE Trans. Electron Devices 51, 279-282
  5. Gopalakrishnan K, Griffin P, Plummer J. I-MOS .2002. A novel semiconductor device with a subthreshold slope lower than kT/q. IEDM Technical Digest 289-292.
  6. Reddick W, Amartunga G. 1995. Silicon surface tunnel transistor Appl. Phys. Lett 67 494-496.
  7. Semiconductor Industry Association (SIA), International Technology Roadmap for Semiconductors (ITRS). 2009. available online.
  8. Quinn J, Kawamoto, McCombo B 1978 Subband spectroscopy by surface channel tunneling Surf. Sci 73, 190-196.
  9. Hansch W, Fink C, Schulze J, and Eisele I .2000. A vertical MOS-gated Esaki tunneling transistor in silicon Thin Solid Film 369, 387-389.
  10. Aydin C, Zaslavsky C, Luryi S, Cristoloveanu S, Mariolle D, Fraboulet D ,and Deleoniibus S. 2004. Lateral interband tunneling Transistor in silicon-on-insulator. Appl. Phys. Lett 84, 1780-82.
  11. Boucart K, Ionescu A. 2008. A new definition of threshold voltage in Tunnel FETS. Solid State Electronics 52, 1318-23.
  12. Boucart K, Ionescu A. 2007. Double gate tunnel FET with high K gate dielectric. IEEE Trans. Electron Devices 54(7), 1725-33.
  13. Bhuwalka K, Schulze J, Eisele I. 2004. Performance enhancement of vertical tunnel field effect transistor with SiGe in the delta P+ layer. Jpn J. Appl. Phys. 43, 4073-4078.
  14. Choi WY, Lee W.2010. Heterogate Dielectric tunneling Field effect Transistors IEEE Transaction on Electron Devices, 57(9), 2317-2319.
  15. Knoch J, Appenzeller J. 2005. A novel concept for field effect transistors – the tunneling carbon nano tube FET Proceedings of the 63rd DRC, I ,153-158.
  16. Moller H and V Schlichting V. 1989. Polycrystalline Semiconductors Spinger – Verlag, 331.
  17. Tsividis Y. 1999. Operation and Modelling of the MOS Transistor 2nd Edition McGraw Hill.
  18. Bardon MG, Neves HP, Puers R and, Van Hoof C. 2010. Pseudo Two Dimensional Model for Double-gate Tunnel FETS considering Junction depletion regions IEEE Trans on Electron Devices,57.
  19. Kane EO. 1960. Zener tunneling in semiconductors J Appl. Phys. Chem. Solids, 12 (2), 181-188.
  20. Synopsys TCAD Sentaurus Device Manual 2010.
  21. Bhuwalka K , Born M , Sedlmaier S Schulze J and, Eisele I. 2005. Scaling parameters of tunnel field effect transistor. Proceedings of the International conference on ultimate integration of Si, 135-8.
  22. Bhuwalka K, Schulze J , Eisele I. 2005. Scaling the vertical tunnel FET with tunnel band gap modulation and gate work function Engineering, IEEE Trans Electron Devices, 52, 909-17.
  23. Boucart K, Ionescu AM. 2007. Length scaling of the Double gate Tunnel FET with a high k gate dielectric. Solid state Electronics, 51, 1500-1507.
  24. Takayanagi, Iwabuchi M. 1991. Theory of band-to-band tunneling under nonuniform electric fields for subbreakdown leakage currents IEEE Trans. On Electron Devices, 38 (6), 1425-1431.
  25. Jiao GF, Chen ZX, Yu HY, Huang XY, Huang HM, Singh N, Lo GQ, Kwong DL ,and Ming-Fu Li. 2010. Experimental Studies of Reliability Issues in Tunneling Field-Effect Transistors IEEE Electron Device Letters, 31.
  26. Collinge JP. 2008. Silicon on insulator Technology: Materials to VLSI, 3rd ed, SPRINGER.


Band-to-band tunneling, hetero material, subthreshold swing, threshold voltage