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Machine Learning Adaptation in Post Silicon Server Validation

Pridhiviraj Paidipeddi, Dheerendra Singh Tomar Published in Information Sciences

International Journal of Applied Information Systems
Year of Publication: 2014
© 2013 by IJAIS Journal
10.5120/ijais14-451252
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  1. Pridhiviraj Paidipeddi and Dheerendra Singh Tomar. Article: Machine Learning Adaptation in Post Silicon Server Validation. International Journal of Applied Information Systems 7(11):11-14, November 2014. BibTeX

    @article{key:article,
    	author = "Pridhiviraj Paidipeddi and Dheerendra Singh Tomar",
    	title = "Article: Machine Learning Adaptation in Post Silicon Server Validation",
    	journal = "International Journal of Applied Information Systems",
    	year = 2014,
    	volume = 7,
    	number = 11,
    	pages = "11-14",
    	month = "November",
    	note = "Published by Foundation of Computer Science, New York, USA"
    }
    

Abstract

As the complexity of modern server processors increases so the validation challenges. Current design validation methods cover less, resulting in bug escape and more regress post-silicon validation. The biggest problem is manual debugging of several failures by large number of test cases. By using machine learning in server validation, validation efforts and resource requirement will reduce. Validation of future generation server will be done through the learning set generated from the previous generation device, which is a set of test cases being passed.

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Keywords

Debugging, Learning set, Machine learning, Post-silicon, Server, System under test (SUT), Validation.