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Adaptive Post-silicon Server Validation using Machine Learning

Paidipeddi Pridhiviraj, Tomar Dheerendra S, P Muralidhar Published in Artificial Intelligence

International Journal of Applied Information Systems
Year of Publication: 2015
© 2015 by IJAIS Journal
10.5120/ijais15-451358
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  1. Paidipeddi Pridhiviraj, Tomar Dheerendra S and P Muralidhar. Article: Adaptive Post-silicon Server Validation using Machine Learning. International Journal of Applied Information Systems 9(1):24-32, June 2015. BibTeX

    @article{key:article,
    	author = "Paidipeddi Pridhiviraj and Tomar Dheerendra S and P Muralidhar",
    	title = "Article: Adaptive Post-silicon Server Validation using Machine Learning",
    	journal = "International Journal of Applied Information Systems",
    	year = 2015,
    	volume = 9,
    	number = 1,
    	pages = "24-32",
    	month = "June",
    	note = "Published by Foundation of Computer Science, New York, USA"
    }
    

Abstract

This paper mainly focuses on providing solutions for efficient feature validation. Modern day server processors and computer systems are developed with billions of transistors. Validation of such a complex systems is playing a crucial role in current research. Pre-silicon validation is not enough to get a full system functional coverage. Post-silicon validation is a necessary step to validate these complex systems and to determine the escaped functional silicon bugs during pre-silicon validation. During post-silicon validation in order to get a full system functional coverage there are more number of features for testing. Applying all the features manually and going through the each test results is difficult to maintain. In order to reduce resource requirements for determining test failure signature, and to reduce the time to debug the failure, introduced the machine learning in current validation environment. The proposed validation algorithm in this paper, which is very useful in feature validation of server processer's and is adaptive to the previous validation learning's. Validation is mainly carried out for power management features provided by Advanced Configuration and Power Interface specification. The functional coverage implemented for important power management features namely processor power states, processor performance states and thermal states. This feature coverage analysis is provided through graphical plots.

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Keywords

Adaptation, Debugging, Feature, Functional coverage, Learning set, Machine learning, Pre-silicon, Post-silicon, Power management, System under test (SUT), Thermal management and Validation.