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An overview and Analysis of Low Power SRAM Design

R. A. Burange, G. H. Agrawal Published in Electronics

IJAIS Proceedings on 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
Year of Publication: 2013
© 2012 by IJAIS Journal
10.5120/ncipet1333
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  1. R A Burange and G H Agrawal. Article: An overview and Analysis of Low Power SRAM Design. IJAIS Proceedings on 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013) NCIPET(1):33-35, November 2013. BibTeX

    @article{key:article,
    	author = "R. A. Burange and G. H. Agrawal",
    	title = "Article: An overview and Analysis of Low Power SRAM Design",
    	journal = "IJAIS Proceedings on 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)",
    	year = 2013,
    	volume = "NCIPET",
    	number = 1,
    	pages = "33-35",
    	month = "November",
    	note = "Published by Foundation of Computer Science, New York, USA"
    }
    

Abstract

Static Random Access memory (SRAM) is a matrix of static volatile memory cell. Different techniques used for power optimization and Challenges regarding reduction of static and dynamic powers are discussed. Power reduction of other supporting circuits like Sense amplifier is analyzed with respect to a standard design.

Reference

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Keywords

static Random Access Memory(SRAM), Low Power, Bit Line, Charge Recycling, Low Swing.